Electrical conductor line having a multilayer diffusion barrier for use in a semiconductor device and method for forming the same

ABSTRACT

An electrical conductor having a multilayer diffusion barrier of use in a resultant semiconductor device is presented. The electrical conductor line includes an insulation layer, a diffusion barrier, and a metal line. The insulation layer is formed on a semiconductor substrate and having a metal line forming region. The diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and has a multi-layered structure made of TaN layer, an Mo x O y  layer and an Mo layer. The metal line is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority to Korean patent applicationnumber 10-2008-0073170 filed on Jul. 25, 2008, which is incorporatedherein by reference in its entirety.

BACKGROUND OF THE INVENTION

The present invention relates to a metal line of a semiconductor deviceand a method for forming the same, and more particularly, to a metalline of a semiconductor device that exhibits improved physical andperformance characteristics which results in improving the reliabilityof a resultant semiconductor device and a method for forming the same.

Generally, in a semiconductor device, metal lines are formed toelectrically connect elements or lines to each other. Contact plugs areformed to connect lower metal lines and upper metal lines to each other.As the high integration of a semiconductor device continues to proceed,the design rules necessarily result in gradually increasing the aspectratios of a contact hole in which a contact plug is to be formed. As aresult, the process for forming metal lines and contact plugs becomemore difficult because these diminutive metal lines and contact plugsmust also maintain their physical and performance characteristics suchas assuring that unwanted impurities do not diffuse past certainbarriers.

Aluminum and tungsten have been mainly used as conductive materials inthe metal lines of a semiconductor device because they exhibitrelatively good electrical conductivity properties and because they donot tend towards adversely affecting the performance of the resultantsemiconductor device due to unwanted diffusion away from these metallines. Recently, research has been made in the hopes of using copper asa next-generation material for a metal line because copper exhibitssuperior electrical conductivity and low resistance as compared toaluminum and tungsten. Copper (Cu) can therefore solve or at least aidin minimizing the problems associated with RC (resistance-capacitance)signal delay in the semiconductor device having a high level ofintegration and high operating speed.

It is known that copper diffuses very fast through semiconductorsubstrates and through insulation layers. Further the diffused copper isknown to act as a deep-level impurity in the semiconductor substratemade of silicon and can induce leakage currents. Therefore, it isnecessary to form a diffusion barrier at an interface between a copperlayer acting as a metal line and the surrounding insulation layer.Generally, the diffusion barrier made of TaN/Ta layers is able torestrain copper from diffusing beyond the confines of the metal line.

Hereinbelow, a conventional method for forming a metal line of asemiconductor device will be briefly described.

After forming an insulation layer on a semiconductor substratedesignated to have a metal line forming region, TaN/Ta layers serving asa diffusion barrier and a copper seed layer are sequentially formed onthe surface of the insulation layer. The Ta layer functions to increasethe adhesion force between the diffusion barrier and the copper seedlayer. Then, after forming a copper layer on the copper seed layer, byusing CMPing (chemically and mechanically polishing) on the copperlayer, a copper metal line is formed.

However, in the conventional art described above, it is necessary toform a thick Ta layer so as to increase the adhesion force between thediffusion barrier and the copper seed layer. Due to this fact, in theconventional art described above, the thickness of the diffusion barrierincreases, and the thickness of the copper layer necessarily decreasesbecause of the geometric constraints of the diminutive structure,whereby the characteristics of the copper metal line deteriorates.

Also, in the conventional art described above, in order to reduce theagglomeration of copper, the copper seed layer should be formed throughPVD (physical vapor deposition) at a low temperature. Due to this fact,in the conventional art described above, the step coverage of the copperseed layer becomes poor, which leads to the formation of unwantedoverhangs. As a consequence, the entrance to the metal line formingregion is likely to be clogged which in turn results in forming voidsalong and within the metal line.

These problems are getting worse as the design rule of a semiconductordevice gradually decreases and as a result the characteristics and thereliability of the resultant semiconductor devices can deteriorate.

BRIEF SUMMARY OF THE INVENTION

Embodiments of the present invention are directed to a metal line of asemiconductor device which can improve the characteristics of a metalline and a method for forming the same.

Embodiments of the present invention are also directed to metal lines ofa resultant semiconductor device that can prevent or at least minimizethe occurrence of voids from being created in a metal line and aredirected to methods for forming the same.

Further embodiments of the present invention are directed to metal linesof a semiconductor device that exhibit improved the characteristics andreliability in the resultant semiconductor devices and are directed tomethods for forming the same.

In one aspect of the present invention, a metal line of a semiconductordevice comprises an insulation layer formed on a semiconductor substrateand having a metal line forming region; a diffusion barrier formed on asurface of the metal line forming region of the insulation layer andhaving a multi-layered structure of a TaN layer, an Mo_(x)O_(y) layerand an Mo layer; and a metal line formed on the diffusion barrier tofill the metal line forming region of the insulation layer.

The TaN layer has a thickness of about 5˜50 Å.

The Mo_(x)O_(y) layer has a thickness of about 5˜50 Å.

In the Mo_(x)O_(y) layer, x has a range of about 0.1˜5 and y has a rangeof about 0.1˜5.

The Mo layer has a thickness of about 100˜400 Å.

The metal layer comprises a copper layer.

In another aspect of the present invention, a method for forming a metalline of a semiconductor device comprises the steps of forming aninsulation layer on a semiconductor substrate to have a metal lineforming region; forming a diffusion barrier on the insulation layerincluding a surface of the metal line forming region to have amulti-layered structure of a TaN layer, an Mo_(x)O_(y) layer and an Molayer; and forming a metal line on the diffusion barrier to fill themetal line forming region.

The step of forming the diffusion barrier comprises the steps of forminga TaN layer on the insulation layer including a surface of the metalline forming region; depositing a first Mo layer on the TaN layer;forming an Mo_(x)O_(y) layer by oxidating the first Mo layer; anddepositing a second Mo layer on the Mo_(x)O_(y) layer and therebyforming a multi-layered structure of the TaN layer, the Mo_(x)O_(y)layer and an Mo layer.

The TaN layer is formed to have a thickness of about 5˜50 Å.

The first Mo layer is formed to have a thickness of about 5˜25 Å.

The step of forming the Mo_(x)O_(y) layer by oxidating the first Molayer is implemented by using either a O₂ plasma process or a O₂stuffing procedure.

The O₂ plasma process uses an O₂ and Ar gases having a composition ratioof the O₂ to Ar gas at about 0.1˜0.9.

The O₂ plasma process is conducted at a temperature of about 25˜250° C.

The O₂ plasma processing is conducted under a pressure of about 1˜760mTorr.

The O₂ stuffing procedure also uses O₂ and Ar gas, and also uses a O₂ toAr composition ratio of about 0.1˜0.9.

The O₂ stuffing procedure is conducted at a temperature of about 50˜400°C.

The O₂ stuffing is conducted under a pressure of about 1˜760 mTorr

The Mo_(x)O_(y) layer is formed to have a thickness of about 5˜50 Å.

In the Mo_(x)O_(y) layer, x has a range of about 0.1˜5 and y has a rangeof about 0.1˜5.

The second Mo layer is deposited using PVD.

The second Mo layer is deposited at a temperature of about −25˜25° C.

The second Mo layer is deposited to a thickness of about 100˜400 Å.

The metal layer comprises a copper layer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view illustrating a metal line of a semiconductordevice in accordance with an embodiment of the present invention.

FIGS. 2A through 2G are sectional views illustrating the processes of amethod for forming a metal line of a semiconductor device in accordancewith another embodiment of the present invention.

DESCRIPTION OF SPECIFIC EMBODIMENTS

Hereafter, specific embodiments of the present invention will bedescribed in detail with reference to the attached drawings.

FIG. 1 is a sectional view illustrating a metal line of a semiconductordevice in accordance with an embodiment of the present invention.

Referring to FIG. 1, an insulation layer 102 is formed on asemiconductor substrate 100 which is formed with a predeterminedunderstructure (not shown), to have a metal line forming region D. Themetal line forming region D can be defined by using a single damasceneprocess or a dual damascene process to have a trench structure or atrench and via-hole structure which has a trench and at least onevia-hole communicating with the trench. While not shown in a drawing, itis conceivable that the insulation layer 102 can comprise the stackstructure of first and second insulation layers. In this case, an etchstop layer is formed between the first and second insulation layers. Theetch stop layer comprises, for example, an SiN layer.

A diffusion barrier 110 is formed on the surface of the metal lineforming region D which is defined in the insulation layer 102. Thediffusion barrier 110 is shown having a multi-layered structure thatincludes a TaN layer 104, an Mo_(x)O_(y) layer 106 and a second Mo layer108. In the diffusion barrier 110, the TaN layer 104 may have anythickness, preferably having a thickness of about 5˜50 Å; theMo_(x)O_(y) layer 106 may have any thickness, preferably having athickness of about 5˜50 Å; and the second Mo layer 108 may have anythickness, preferably having a thickness of about 100˜400 Å. In theMo_(x)O_(y) layer 106 the stoichiometric ratios may be any relativeratios, in which the x subscript may preferably exist in a range ofabout 0.1˜5 and the y subscript may preferably exist in a range of about0.1˜5.

A metal line 114 formed on the diffusion barrier 110 substantially fillsin the metal line forming region D. The metal line 114 may be composedof any conductive material or metal, in which the metal line 114preferably comprises a copper layer 112.

As described above, the metal line 114 according to the embodiment, thepresent invention has the diffusion barrier 110 which is formed betweenthe copper layer 112 and the insulation layer 102 and is composed of amulti-layered structure that comprises a TaN layer 104, a Mo_(x)O_(y)layer 106 and a second Mo layer 108. The second Mo layer 108 has lowsolid solubility with respect to other metal elements and thereforeensures in establishing and maintaining excellent characteristics of theresultant diffusion barrier 110. According to this fact, in the presentinvention, due to the presence of the diffusion barrier 110 which isstructured to include the second Mo layer 108, it is possible to preventor at least minimize the occurrence that the constituent of the copperlayer 112 is inhibited from diffusing outside of the confines of thediffusion barrier 110.

Also, in the present invention, due to the presence of the Mo_(x)O_(y)layer 106 which is formed through the oxidation of a first Mo layer, thedensity at the peripheral portions of grains which serve as diffusionpaths can be increased, whereby the characteristics of the diffusionbarrier 110 can be further effectively enhanced.

Further, in the present invention, since the diffusion barrier 110 has amulti-layered structure comprising the Mo_(x)O_(y) layer 106 and thesecond Mo layer 108, the characteristics of the diffusion barrier 110can be improved even though the thickness of the TaN layer 104 can behalf that in comparison with the conventional art. Accordingly, in thepresent invention, the characteristics and the reliability of theresultant semiconductor device can be substantially improved.

Moreover, in the present invention, the diffusion barrier 110 includesthe second Mo layer 108 that exhibits a relatively low resistance.Through this fact, in the present invention, the second Mo layer 108 canserve not only as the diffusion barrier 110 but also can serve as theseed layer of the copper layer 112. Accordingly, in the presentinvention, since the copper layer 112 can be deposited without a copperseed layer, then it is possible to prevent or at least minimize theoccurrence of forming voids in the metal line 114 because the overhangphenomenon of the copper seed layer does not exist in the presentinvention.

In addition, in the present invention, since the diffusion barrier 110includes the TaN layer 104 and that the TaN layer 104 contacts theinsulation layer 102, then the junction capability between the TaN layer104 and the insulation layer 102 can be improved or enhanced.

FIGS. 2A through 2G depict sectional views that illustrate some of theprocesses of a method for forming a metal line of a semiconductor devicein accordance with another embodiment of the present invention.

Referring to FIG. 2A, an insulation layer 102 is formed on asemiconductor substrate 100 which is formed with a predeterminedunderstructure (not shown), in such a way as to cover theunderstructure. While not shown in a drawing, it is understood that theinsulation layer 102 can be composed of a single or a plurality oflayers such as comprising a stack structure of first and secondinsulation layers. In the case of a stack like structure of theinsulation layer 102, it is preferred that an etch stop layer be formedbetween the first and second insulation layers. The etch stop layer maycomprise any etch stop layer, preferably an SiN layer.

Next, a metal line forming region D is defined by etching into theinsulation layer 102. The metal line forming region D can be defined byusing any metal line forming technique such as using a single damasceneprocess or even a dual damascene process in such a way as to have atrench structure or a trench and via-hole structure which has a trenchand at least one via-hole communicating with the trench.

Referring to FIG. 2B, a TaN layer 104 is then formed on the insulationlayer 102 and on the surface of the metal line forming region D. The TaNlayer 104 is formed using any well known deposition technique such asusing CVD (chemical vapor deposition) or PVD (physical vapordeposition). The thickness of the TaN layer 104 may have any thicknessin which it is preferable that the thickness is about 5˜50 Å.

Referring to FIG. 2C, a first Mo layer 106 a is subsequently formed onthe TaN layer 104. The first Mo layer 106 a is formed using any wellknown deposition technique such as using CVD or PVD. The thickness ofthe first Mo layer 106 a may made at any thickness in which it ispreferable that the thickness is preferably about 5˜25 Å.

Referring to FIG. 2D, by oxidating the first Mo layer 106 a, anMo_(x)O_(y) layer 106 is subsequently formed on the TaN layer 104. Theoxidation of the first Mo layer 106 a may be performed by any oxidationprocedure in which it is preferable that the oxidation of the first Molayer 106 a is implemented using either a O₂ plasma process or a O₂stuffing procedure.

The O₂ plasma process uses O₂ gas and Ar gas. The composition ratio ofthe O₂ gas and the Ar gas is preferable about 0.1˜0.9. Also, the O₂plasma processing is preferably conducted at a temperature of about25˜250° C. under a pressure of about 1˜760 mTorr.

The O₂ stuffing procedure also uses O₂ gas and Ar gas. The compositionratio of the O₂ gas and the Ar gas also preferably about 0.1˜0.9. Also,the O₂ stuffing procedure is preferably conducted at a temperature ofabout 50˜400° C. under a pressure of about 1˜760 mTorr.

The Mo_(x)O_(y) layer 106, which is formed from the first Mo layer 106a, increases in volume and has a resultant thickness of preferably about5˜50 Å. The Mo_(x)O_(y) layer 106 can comprise a stoichiometric ornonstoichiometric ratios. Preferably, the stoichiometric ratios ofMo_(x)O_(y) layer 106 have an x subscript at a range of about 0.1˜5 andy subscript at a range of about 0.1˜5.

Referring now to FIG. 2E, a second Mo layer 108 is subsequently formedon the Mo_(x)O_(y) layer 106. The second Mo layer 108 may be formed byusing any Mo deposition technique in which it is preferable to use PVDas a deposition technique because PVD is less prone to introducingimpurities and thus less prone to increasing in the resultantresistance. The second Mo layer 108 may be formed at any temperature inwhich it is preferable to form the second Mo layer 108 at a temperatureof about −25˜25° C. The second Mo layer 108 may be formed at anythickness in which it is preferable to have a thickness of about 100˜400Å. As a consequence of forming the TaN layer 104, the Mo_(x)O_(y) layer106 and the second Mo layer 108, a multi-layered diffusion barrier 110is formed on the insulation layer 102 and on the surface of the metalline forming region D.

Referring now to FIG. 2F, a metal layer is subsequently formed on thediffusion barrier 110 which substantially fills in the metal lineforming region D. The metal layer can be formed in any manner such aselectroplating and can be formed of any conductive material or metalsuch as be formed as a copper layer 112.

Referring now to FIG. 2G, by CMPing the copper layer 112 and thediffusion barrier 110 until the insulation layer 102 is exposed, a metalline 114 which can be subsequently formed that substantially fills inthe metal line forming region D.

Thereafter, while not shown in a drawing, by sequentially conducting aseries of other well-known subsequent processes, the formation of themetal line of a semiconductor device according to the embodiment of thepresent invention is completed.

As is apparent from the above description, in the present invention, adiffusion barrier, which includes a multi-layered structure of a TaNlayer, an Mo_(x)O_(y) layer and a second Mo layer, is formed between acopper layer and an insulation layer. Due to this fact, the physicalproperty characteristics of the diffusion barrier can be effectivelyimproved by having the second Mo layer which has low solid solubilitywith respect to other metal elements and by having the Mo_(x)O_(y) layerwhich is formed through oxidation of a first Mo layer so as to increasea density at the peripheral portions of grains serving as diffusionpaths. Therefore, in the present invention, as the characteristics ofthe diffusion barrier are improved, it is possible to prevent or atleast minimize the occurrence of copper from diffusing through thediffusion barrier and adversely affecting the performance of theresultant semiconductor device. Thereby the present invention providesimproved and desirable performance characteristics of the resultantmetal line of a semiconductor device.

Further, in the present invention, since the diffusion barrier is formedhaving the multi-layered structure which includes the Mo_(x)O_(y) layerand the second Mo layer, the physical and performance characteristics ofthe diffusion barrier can be improved while at the same time the presentinvention makes it is possible to decrease the thickness of the TaNlayer to half that as compared to the conventional arts. By doing this,in the present invention, the characteristics and the reliability of theresultant semiconductor device can be improved.

Moreover, in the present invention, when forming the multi-layereddiffusion barrier of the TaN layer, the Mo_(x)O_(y) layer and the secondMo layer, since the second Mo layer which has low resistance comes intocontact with the copper layer, the second Mo layer can serve not only asthe diffusion barrier but also as the seed layer of the copper layer.Accordingly, in the present invention, because the copper layer can bedeposited without a copper seed layer, it is possible to prevent or atleast minimize voids from being created in the metal line due to theoverhang phenomenon of the copper seed layer.

In addition, in the present invention, when forming the multi-layereddiffusion barrier having the TaN layer, the Mo_(x)O_(y) layer and thesecond Mo layer, because the TaN layer comes into contact with theinsulation layer, the junction capability between the TaN layer and theinsulation layer can be improved.

Although specific embodiments of the present invention have beendescribed for illustrative purposes, those skilled in the art willappreciate that various modifications, additions and substitutions arepossible, without departing from the scope and the spirit of theinvention as disclosed in the accompanying claims.

1. An electrical conductor line of a semiconductor device, comprising:an insulation layer formed on a semiconductor substrate and having ametal line forming region; a multi-layered diffusion barrier formed on asurface of the metal line forming region of the insulation layer, thediffusion barrier comprising a TaN layer, an Mo_(x)O_(y) layer on theTaN layer and an Mo layer on the Mo_(x)O_(y) layer; and a metal lineformed on the diffusion barrier substantially filling in the metal lineforming region of the insulation layer.
 2. The electrical conductor lineaccording to claim 1, wherein the TaN layer and the Mo_(x)O_(y) layerboth have a thickness of about 5˜50 Å.
 3. The electrical conductor lineaccording to claim 1, wherein in the x subscript of the Mo_(x)O_(y)layer is between a range of about 0.1˜5 and the y subscript of theMo_(x)O_(y) layer is between a range of about 0.1˜5.
 4. The electricalconductor line according to claim 1, wherein the Mo layer has athickness of about 100˜400 Å.
 5. The electrical conductor line accordingto claim 1, wherein the metal layer comprises a copper metal layer.
 6. Amethod for forming a electrical conductor line of a semiconductordevice, comprising the steps of: forming a metal line forming region inan insulation layer on a semiconductor substrate; forming amulti-layered diffusion barrier on the metal line forming region of theinsulation layer, the diffusion barrier comprising a TaN layer, anMo_(x)O_(y) layer and an Mo layer; and forming a metal line on thediffusion barrier to substantially fill in the metal line formingregion.
 7. The method according to claim 6, wherein the step of formingthe diffusion barrier comprises the steps of: forming a TaN layer on themetal line forming region of the insulation layer; depositing a first Molayer on the TaN layer; forming an Mo_(x)O_(y) layer by oxidating thefirst Mo layer; and depositing a second Mo layer on the Mo_(x)O_(y)layer wherein the diffusion barrier is multi-layered having the TaNlayer, the Mo_(x)O_(y) layer and the Mo layer.
 8. The method accordingto claim 7, wherein the TaN layer has a thickness of about 5˜50 Å. 9.The method according to claim 7, wherein the first Mo layer has athickness of about 5˜25 Å.
 10. The method according to claim 7, whereinthe step of forming the Mo_(x)O_(y) layer by oxidating the first Molayer is implemented by utilizing a O₂ plasma process or by utilizing O₂stuffing procedure.
 11. The method according to claim 10, wherein the O₂plasma process uses O₂ gas and Ar gas with a composition ratio of O₂ gasto Ar gas at about 0.1˜0.9.
 12. The method according to claim 10,wherein the O₂ plasma process is conducted at a temperature of about25˜250° C. at a pressure of about 1˜760 mTorr.
 13. The method accordingto claim 10, wherein the O₂ stuffing procedure uses O₂ gas and Ar gas ata composition ratio of O₂ gas to Ar gas at about 0.1˜0.9.
 14. The methodaccording to claim 10, wherein the O₂ stuffing procedure is conducted ata temperature of about 50˜400° C. at a pressure of about 1˜760 mTorr.15. The method according to claim 7, wherein the Mo_(x)O_(y) layer has athickness of about 5˜50 Å.
 16. The method according to claim 7, wherein,in the Mo_(x)O_(y) layer, x has a range of about 0.1˜5 and y has a rangeof about 0.1˜5.
 17. The method according to claim 7, wherein the secondMo layer is deposited through Physical Vapor Deposition (PVD).
 18. Themethod according to claim 7, wherein the second Mo layer is deposited ata temperature of between about −25˜25° C.
 19. The method according toclaim 7, wherein the second Mo layer has a thickness of between about100˜400 Å.
 20. The method according to claim 6, wherein the metal layercomprises a copper layer.